CMOS Based SNR Measurement for Wireless Application
Keywords:Complementary Metal Oxide Semiconductor, Divider Circuit, Multiplier circuit, Signal to Noise Ratio (SNR).
This paper presents the design of a CMOS based Signal to Noise Ratio (SNR) detection system. The design system is developed using divider, multiplier and an additional multiplier in a feedback loop. The divider in the designed system produce 1/V of the signal and multiplier produces the average squared SNR signal. The last stage in this design circuit is a low pass filter necessary to implement the desired “average” measure of the signal to noise ratio (SNR). From simulation, the output voltage of SNR is 9.167mVp-p and from practical, the output voltage is 13.2mVp-p.
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Copyright (c) 2018 Mohd Khuzairi Bin Che Kamarudin
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